In recent years, further miniaturization and thinning of electronic devices have been promoted, and miniaturization and thinning have also been desired for the electronic components of semiconductor devices and the like. In order to meet such a requirement, wafer level packages that are implemented in a wafer state up to the packaging operation have been developed and put into practical use.
In wafer level packages, after the element-forming surface of a semiconductor wafer has been sealed with a mold resin, thinning is performed by grinding (backgrinding) the surface of the semiconductor wafer on the opposite side to the element-forming surface.
Japanese Laid-open Patent Publication No. 2003-218144, Japanese Laid-open Patent Publication No. 2003-133499, and Japanese Laid-open Patent Publication No. 2011-223014 are examples of related art.
An objective is to provide a semiconductor device manufacturing method with which a warp of a semiconductor wafer is able to be suitably corrected, and a semiconductor device in which a warp has been suitably corrected.